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Learning Outcomes

TopThe objective of this module is concerned with design techniques involving the use of parallelism to improve the performance of computer systems. The module is divided into three parts. Part I considers the fundamental methods to improve the performance of single processor systems. Topics include the design principle of instruction set, memory hierarchy, pipeline design techniques, RISC and vector computer. In Part II, multi-processor systems using shared memory are examined in detail, and Part III, multi-processor systems that do not use shared memory are examined.

Prerequisites

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CS2106 Operating Systems

Teaching Modes

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Lectures: 2 hrs/week
Tutorials: 1 hr/week
Term Assignment(s).

Schedule

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First Half:

Week 1: Fundamentals of Processor Execution Cycles (Revision)
Week 2-3: Pipelining
Week 4-5: Superscalar Pipelines
Week 6-7 (?): VLIW, EPIC

Second Half (Tentative):

Week 8-9 : Stack, dataflow and vector architectures
Week 10-11: Multiprocessor Systems
Week 12: Cache Coherence
Week 13: Parallel Programming and Revision

Syllabus

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First Half:

Fundamentals of Processor Execution Cycles
Pipelining: Conflict and Hazard Resolution
Superscalar Pipelines: Instruction Level Parallelism, Pipeline Scheduling
Other architectures: VLIW, EPIC

Second Half:

Alternative architectures.
Multi-processors and interconnections
Memory hierarchy in multi-processors context
Cache coherency

Module Overview

Learning Outcomes

Prerequisites

Teaching Modes

Schedule

Syllabus

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